Publications

2013

  • Ultra Low Energy Design Exploration of Digital Decimation Filters in 65 nm Dual-VT CMOS in the Sub-VT Domain

    Details DOI BIBTEX

2012

2011

2010

2009

  • Energy Dissipation Reduction of a Cardiac Event Detector in the Sub-VT Domain By Architectural Folding

    Details PDF DOI BIBTEX

  • Energy Efficiency Enhancement of Sub-threshold Digital CMOS - Modeling, Technology Selection, and Architectural Exploration

    Details PDF DOI BIBTEX

  • A Current Sensing Completion Detection Method for Asynchronous Pipelines Operating in the Sub-threshold Regime

    Details PDF DOI BIBTEX

2008

2007

2006

2004

2003