A Chip Integrity Monitor for Evaluating Moisture/Ion Ingress in mm-Sized Single-Chip Implants

Abstract

For mm-sized implants incorporating silicon integrated circuits, ensuring life-time operation of the chip within the corrosive environment of the body still remains a critical challenge. For the chips packaging, various polymeric and thin ceramic coatings have been reported, demonstrating high biocompatibility and barrier properties. Yet, for the evaluation of the final packaging and lifetime prediction, the conventional helium leak test method can no longer be used due to the mm-size of such implants. Alternatively, accelerated soak studies are typically used instead. For such studies, early detection of moisture/ion ingress using an in-situ platform may result in a better prediction of lifetime functionality. In this work, we have developed such a platform on a CMOS chip. The changes in the inter layer dielectric resistance within the chip represent the ingress, and are tracked by the implemented chip, which consists of a sensing array and an on-chip measurement engine. The measurement system uses a novel charge/discharge based time-mode resistance sensor that can be implemented using simple yet highly robust circuitry. The sensor array is implemented together with the measurement engine in a standard 0.18 m 6-metal CMOS process. The platform was validated through a series of dry and wet measurements. Wet measurements in saline demonstrated the sensitivity of the platform in detecting moisture/ion ingress. Such a platform could be used both in accelerated soak studies and during the implant’s life-time for monitoring the integrity of the chips packaging.

Publication
In IEEE Transactions on Biomedical Circuits and Systems