Design of Completion Detection Circuits for Self-Timed Systems Operating in Subthreshold Regime


In this paper implementation of a novel completion detection method for self-timed, asynchronous subthreshold circuits is presented. By employing the self-timed operation principle, substantial speed gains in the operation of the asynchronous pipelines can be realized. The completion detection system is very simple, consisting of a sensor transistor, a very basic AC- coupled amplifier and a monostable multivibrator. The proposed method can be easily integrated into the CMOS design flow. The advantages of the proposed completion detection system is shown through simulations on an 8-bit ripple carry adder in a standard 0.18/irre CMOS process operating at 400mV supply voltage.

In Proceedings of Ph.D. Research in Microelectronics and Electronics Conference